The Linux Plumbers 2019 RISC-V MC will continue the trend established in 2018  to address different relevant problems in RISC-V Linux land.
The overall progress in RISC-V software ecosystem since last year has been really impressive. To continue the similar growth, RISC-V track at Plumbers will focus on finding solutions and discussing ideas that require kernel changes. This will also result in a significant increase in active developer participation in code review/patch submissions which will definitely lead to a better and more stable kernel for RISC-V.
RISC-V Platform Specification Progress, including some extensions such as power management - Palmer Dabbelt
Fixing the Linux boot process in RISC-V (RISC-V now has better support for open source boot loaders like U-Boot and coreboot compared to last year. As a result of this developers can use the same boot loaders to boot Linux on RISC-V as they do in other architectures, but there's more work to be done) - Atish Patra
RISC-V hypervisor emulation  - Alistair Francis
RISC-V hypervisor implementation - Anup Patel
NOMMU Linux for RISC-V - Damien Le Moal
More to be added based on CfP for this microconference
If you are interested in participating in this microconference and have topics to propose, please use the CfP process. More topics will be added based on CfP for this microconference.
Atish Patra (firstname.lastname@example.org) or Palmer Dabbelt (email@example.com)
IOMMU is a very popluar equipment for both embed and server virtualization area. In the topic we'll focus on embed area and shared virtual address.
Firstly, we'll talk about the value of IOMMU for the embed system and what the benefit we could get from IOMMU in our cost-down embed system.
Secondly, Guo will share the experience on the IOMMU implementation, eg: How to keep the same asid with...
RISC-V trace spec draft have defined some trace format, we'll share our implementation of linux perf trace based on the spec. How to deal with SMP perf issues, how to verify our design in qemu, demonstrate a demo of perf trace with riscv-qemu.
Lastly, let's discuss perf issues from PMU to trace, any riscv perf topic.