9–11 Sept 2019
Europe/Lisbon timezone

C-state latency measurement infrastructure

10 Sept 2019, 17:50
25m
Esmerelda/room-I&II (Corinthia Hotel Lisbon)

Esmerelda/room-I&II

Corinthia Hotel Lisbon

126

Speaker

Artem Bityutskiy

Description

We in Intel developed instrumentation for measuring C-state wake latency. The instrumentation, which we call "waltr" (WAke up Latency Tracer) consists of user-space and kernel modules parts.

In principle, waltr works by scheduling delayed interrupts and measuring the wake latency close to the x86 'mwait' x86 instruction. This requires an external device equipped with high precision clock and capable of delayed interrupts. We have been
using the Intel i210 Ethernet adapter for these purposes. But theoretically this
could be a completely different device, e.g., a GFX card.

The C-state latency measurement instrumentation should be very useful for the open-source community and we would like to upstream the kernel parts of it. We are seeking for feedback on how to properly modify the kernel in a maintainable and reusable way, to benefit everyone.

Here are few examples for the dilemmas have.
* How do we design a framework for compliant devices like the i210 adapter?
* What would be the right user-space API for the delayed interrupts provider?
* How do we take snapshots of C-state counters and deliver them to user-space?

I am asking for a 20-30 minutes time-slot. And I am hoping to talk to people more about this in hallway discussions.

I agree to abide by the anti-harassment policy Yes

Primary author

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